Below are the projects that I have worked in the past. Here is a complete list of the projects’ publications.
- SPAM was a joint project, which involved MIT (Srinivas Devadas), Princeton (Sharad Malik), UC Berkeley (Kurt Keutzer) and U. of Aachen (Heinrich Meyer) and had for goal the design of an optimising compiler for embedded processors. Most of my work in this project was related to finding optimisation algorithms for datapath and address computation. Techniques derived from these methods have been incorporated into Fujitsu Elixer compiler.
- CodeGen was a spin-off of the SPAM project, which resulted in efficient solutions to the problems of global array reference allocation and offset-assignment. These techniques were integrated into Conexant and Mindspeed DSP compilers.
- ChameLeon was a collaboration with MIT (Srinivas Devadas) and Princeton (Sharad Malik), aiming at synthesizing hardware co-processors to accelerate loop computation. In ChameLeon, I have worked on researching novel datapath merging algorithms. This project was jointly funded by CNPq and NSF.
- MicroLeon was a project which had for goal to find new techniques to reduce program size. Its main focus was to improve cache density, and decrease bus transactions and energy consumption. In this project, I have proposed new algorithms for code and microcode compression, the latter in collaboration with Intel.
- PowerSC is an ESL based framework for power estimation. My work in PowerSC involved the design of its computational reflection and overloading mechanisms. PowerSC enabled the creation of high-level power models for switching activity prediction and optimisation.
- ArchC is a hardware description language designed to speed-up processor description and simulation. An ArchC processor model can be used to explore platform design, and synthesise an entire software toolchain including assemblers, linkers and compiler back-ends, easing the task of hw/sfw co-design.
- BrazilIP was a joint collaboration I proposed in 2003 to network microelectronics efforts in academia. It has for goal to enable fast silicon IP-core prototyping. The methodology flow involved ESL modelling, FPGA design, and silicon tape-out, and resulted in many first-silicon chips (e.g. MP3 and MPEG4 decoders). It originally involved eight Brazilian universities, but grew up to a network of more than 20 institutions. The work developed in BrazilIP was reported at EETimes.
DISCLAIMER: This is a personal page and not an official UNICAMP page. Its contents are of entire responsibility of Guido Araujo.